o3112nkpc 20121009-s00002 no.a2144-1/8 semiconductor components industries, llc, 2013 may, 2013 http://onsemi.com LV0229XA overview the LV0229XA is a front monitor optoelectronic ic for optical pickups that has a built-in photo diode compatible with three waveforms. LV0229XA is sm all size and type csp packages. functions ? pin photodiode compatible with three wavelengths incorporated. ? gain adjustment (-5db to +5db in 256 steps) through serial communication. ? amplifier to amplify differential output. features ? photodiode compatible with three wavelengths incorporated, high-speed process employed. ? compact, thin csp package employed. ? use ar coated glass for th ree-wavelength (one side). specifications absolute maximum ratings at ta = 25 c parameter symbol conditions ratings unit maximum supply voltage v cc 6v allowable power dissipation pd substrate *1, ta = 75 c 105 mw operating temperature topr -20 to +75 c storage temperature tstg -40 to +100 c *1: glass epoxy both-side substrate 55mm 45mm 1mm, copper foil area (head: about 85% tail: about 70%) monolithic linear ic front monitor oe-ic for optical pickups ordering number : ena2144 stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended oper ating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliabili ty.
LV0229XA no.a2144-2/8 recommended operating conditions at ta = 25 c parameter symbol conditions ratings unit min typ max operating supply voltage v cc 4.5 5 5.5 v output load capacitance co 12 20 33 pf output load resistance zo 3 k electrical and optical characteristics at ta = 25 c, v cc = 5v, r l = 6k , c l = 20pf parameter symbol conditions iv gain ratings unit min typ max current dissipation i cc 9 14 19 ma sleep current islp 0.2 0.5 ma output voltage when shielded vc at shielding 1.85 2 2.15 v output offset voltage vofs at shielding, voltage between vop-von -30 0 30 mv temperature dependence of offset voltage *1 vofs ta = -10 to +75 c -60 0 60 v/ c optical output voltage *1 voltage between vop-von vlc = 780nm, g = 0db low 1.93 2.41 2.90 mv/ w vh1c middle 4.58 5.73 6.87 vh2c high 10.86 13.58 16.29 vld = 650nm, g = 0db low 2.03 2.54 3.05 vh1d middle 4.82 6.02 7.23 vh2d high 11.42 14.28 17.13 vlb = 405nm, g = 0db low 1.27 1.59 1.90 vh1b middle 3.01 3.76 4.52 vh2b high 7.14 8.92 10.71 light output voltage adjustment range *1 g g = 0db reference, absolute value of adjustment width 4.5 5 5.5 db output saturation voltage *1 vod voltage between vop-von 2000 mv frequency characteristics *1, *2 fcc -3db (1mhz reference), = 780nm light input = 40 w (dc) + 20 w (ac) 40 60 mhz fcd1 -3db (1mhz reference), = 650nm light input = 40 w (dc) + 20 w (ac) low middle 60 85 fcd2 -3db (1mhz reference), = 650nm light input = 40 w (dc) + 20 w (ac) high 50 70 fcb1 -3db (1mhz reference), = 405nm light input = 40 w (dc) + 20 w (ac) low middle 60 85 fcb2 -3db (1mhz reference), = 405nm light input = 40 w (dc) + 20 w (ac) high 50 70 settling time *1 tset 10 15 ns response time *1 tr, tf vo = 0.9vp-p, output level 10 to 90% fc = 10mhz, duty = 50% 4 10 ns linearity *1 lin at output voltage 0.5v and 1.0v (between vop-von) -1 0 1 % light-output voltage temperature dependence voltage between vop-von *1, *3 tc = 780nm, 25 c reference 4 7 10 % td = 650nm, 25 c reference -3 0 3 % tb = 405nm, 25 c reference -4 -1 2 % item with *1 mark indicate the design reference value. item with *2 mark indicate the frequency characteristics when vop and von are applied individually. the frequency characteristics are for the out put voltage adjustment range is -5 to +5db. item with *3 mark indicates the temperature dependence for the case of high / middle / low gain and for the case when the tempe rature is 25 to 75 c for the output voltage adjustment range of -5 to +5db. [expression of output voltage] vn = (sensitivity / 1.78) 5221 / (5221 - 14 gcastep) light intensity ( w)
LV0229XA no.a2144-3/8 package dimensions unit : mm (typ) 3446 pin assignment pin no. pin name function a1 sclk serial communication clock pin a3 sen serial communication enable pin a5 v cc power supply voltage pin b2 ssel register selection pin ssel = low : address 00 to 0fh used ssel = high : address 10 to 1fh used ssel = open : address 70 to 7fh used b4 vop positive side output pin c1 sdio serial communication data pin c3 gnd gnd pin c5 von negative side output pin sanyo : odcsp8(1.35x1.23) 1.23 0.08 (0.52) 0.67 max 1.35 top view side view side view bottom view 0.2 1 3 5 4 2 0.39 0.225 0.225 0.225 0.45 c b a 1 3 5 4 2 a b c v cc sen sclk 5 4 3 2 1 gnd von sdio a b c vop ssel top view pd
LV0229XA no.a2144-4/8 pd assignment *pd size for reference to be used for design block diagram and test circuit diagram + - vref high 0.1 f 6k + - vref vref serial sen sclk sdio ssel bias regulator v cc control 20pf vo+ vo- 20pf v cc gnd low middle * please place decoupling capac itors within 3mm from pin center of chip c enter of pd 1.35 0.615 1.23 0.675 (unit : mm) pd size 0.4 0.4 0.26
LV0229XA no.a2144-5/8 resister table enable selection of the register group from the ssel pin. ssel = low address 7 6 5 4 3 2 1 0 name 00h power iv gain sel default 00 00 0 0 0 0 value 11: power on 00/01/10: sleep 00/01: high 10: middle 11: low name 01h gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 0eh test1 (*1) ssel = high address 7 6 5 4 3 2 1 0 name 10h power iv gain sel default 00 00 0 0 0 0 value 11: power on 00/01/10: sleep 00/01: high 10: middle 11: low name 11h gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 1eh test1 (*1) ssel = open address 7 6 5 4 3 2 1 0 name 70h power iv gain sel default 00 00 0 0 0 0 value 11: power on 00/01/10: sleep 00/01: high 10: middle 11: low name 71h gain default 1 1 1 1 1 1 1 1 value 00000000 to 11111111 name 7eh test1 (*1) * 1 test1 are either the time when power is applied or ?00000000? is set. do not attempt to ch ange ?00000000? during operation. ?00000000? is returned when reading is made. * 2 no problem in terms of operation occurs even when writing is made to the address 02h to 0dh & 0fh, 12h to 1dh & 1fh and 72h t o 7dh & 7fh. ?00000000? is returned when this address is read. * 3 when i performed address reading except the register group se t by an ssel terminal, i keep hi-z without paying a value.
LV0229XA no.a2144-6/8 serial protocol write timing chart read timing chart sdio pin load / c l = 20pf. the table below shows the design reference value. parameter symbol min. typ. max. unit scl clock frequency write f scl 0 10 mhz scl clock frequency read f scl 0 4 mhz sdio data setup time t dsu 50 ns sdio data hold time t dho 50 ns sdio output delay t ddly 10 80 ns sen ?h? period t enh 1.6 s sen ?l? period t enl 200 ns scl rise time after sen rise t sta 60 ns sen fall time after final scl rise t sto 100 ns serial input ?h? voltage v i h 2.4 v cc v serial input ?l? voltage v i l 0.6 v sdio output ?h? voltage v o h 2.5 2.9 3.3 v sdio output ?l? voltage v o l 0 0.3 0.8 v write read (host) sen 1 msb lsb msb lsb 2345678910111213141516 a7 mode address data (output data from host) a6 a5 a4 a3 a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 (host) sclk (host) sdio msb lsb msb lsb 12345678910111213141516 data (output data from op device) a7 mode a6 a5 a4 a3 address a2 a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 (host) sen (host) sclk (host) sdio sdio t ddly (host) sen (host) sclk (host) sdio sdio t enh t sta t dsu t dho t sto t enl (host) sen (host) sclk (host) sdio
LV0229XA no.a2144-7/8 pin type equivalent circuit diagram sdio input output 3v 3v 125k 125k 100k vop von output 20 sclk sen input 3v 100k ssel input 800k 200k 200k 5k
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